DIO5 Reference Manual Digilent, Inc.
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if (adr = "000011" and cs = '0') then regSsg(15 downto 8) <= db; end if;
end if;
end process;
-- Assign outputs of the LED holding registers to the led outputs
rgbLed <= not regLed;
------------------------------------------------------------------------
-- Synthesize control signals for the LCD display
------------------------------------------------------------------------
rgbLcd <= db when (cs = '0' and we = '0') else "ZZZZZZZZ";
lcden <= '1' when (adr = "0001--" and cs = '0' and not ((we = '1') and (oe = '1'))) or
lcen = '1' else '0';
lcdrw <= we;
lcdrs <= adr(0);
------------------------------------------------------------------------
-- Get button inupts: All 16 button inputs are registered. Six buttons
-- (A through F) are passed directly through to output pins on the CPLD,
-- and ten buttons (0 through 9) are encoded to BCD.
------------------------------------------------------------------------
-- Register all buttons
process(rgbBtnIn, lclk)
begin
if lclk = '1' and lclk'Event
then regBtn <= rgbBtnIn;
end if;
end process;
rgbSyncBtn <= regBtn;
-- Assign debounced pass-through buttons to their outputs
rgbBtnOt <= rgbSyncBtn(15 downto 10);
-- 10-4 Line BCD Encoder for Buttons
encBtn <= "0000" when rgbSyncBtn(0) = '1' else
"0001" when rgbSyncBtn(1) = '1' else
"0010" when rgbSyncBtn(2) = '1' else
"0011" when rgbSyncBtn(3) = '1' else
"0100" when rgbSyncBtn(4) = '1' else
"0101" when rgbSyncBtn(5) = '1' else
"0110" when rgbSyncBtn(6) = '1' else
"0111" when rgbSyncBtn(7) = '1' else
"1000" when rgbSyncBtn(8) = '1' else
"1001" when rgbSyncBtn(9) = '1' else
"1111";
------------------------------------------------------------------------
-- Seven Segment Display Driver
------------------------------------------------------------------------
-- Counter to cycle around the four digit numbers.
process (lclk)
begin
if lclk = '1' and lclk'Event then
cntDig <= cntDig + 1;
end if;
end process;
-- Seven Segment Display Decoder. This logic defines a four bit binary to
-- seven segment decoder. The output produces a logic 1 for each segment
-- that should be on and a logic 0 for each segment that should be off.
-- Segment A is the least significant bit.
(5 Seiten)
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